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ltc4415 1 4415fa typical a pplica t ion fea t ures descrip t ion dual 4a ideal diodes with adjustable current limit the ltc ? 4415 contains two monolithic powerpath ideal diodes, each capable of supplying up to 4a with typical forward conduction resistance of 50m. the diode voltage drops are regulated to 15mv during forward conduction at low currents, extending the power supply operating range and ensuring no oscillations during supply switchover. less than 1a of reverse current flows from out to in making this device well suited for power supply oring applications. the two ideal diodes are independently enabled and prioritized using inputs en1 and en2 . the output current limits can be adjusted independently from 0.5a to 4a using resistors on the clim pins. furthermore, the ideal diode currents can be monitored via clim pin voltages. open-drain status pins indicate when the ideal diodes are forward conducting. when the die temperature approaches thermal shutdown, or if the output load exceeds the cur - rent limit threshold, the corresponding warning pins are pulled low. prioritized power supply oring a pplica t ions n dual 50m monolithic ideal diodes n 1.7v to 5.5v operating range n up to 4a adjustable current limit for each diode n low reverse leakage current (1a max) n 15mv forward drop in regulation n smooth switchover in diode oring n load current monitor n precision enable thresholds to set switchover n soft-start to limit inrush current on start-up n status pins to indicate forward diode conduction n current and thermal limit with warning n thermally enhanced 16-lead msop and dfn (3mm 5mm) packages n high current powerpath? switch n battery and wall adapter diode oring n backup battery diode oring n logic controlled high current power switch n supercapacitor oring n multiple battery sharing l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and powerpath is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. ideal ideal ltc4415 gnd en1 4415 ta01a 4.7f to load 100k 21.5k 124 124 clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 in1 out1 out2 primary power source secondary power source + forward voltage drop (mv) 0 load current (a) 3 4 400 4415 ta01b 2 1 0 100 200 300 500 current limit ltc4415 r on = 50m schottky diode mbrs410e forward characteristics of ltc4415 vs mbrs410e schottky
ltc4415 2 4415fa a bsolu t e maxi m u m r a t ings in1, in2, out1, out2, clim1, clim2, stat1 , stat2 , warn1 , warn2 voltage ....... C 0.3v to 6v en1, en2 voltage ................. C 0.3v to max (v inx , v outx ) operating junction temperature range (notes 3, 4) ............................................. C 40c to 125c (note 1) 16 15 14 13 12 11 10 9 17 gnd 1 2 3 4 5 6 7 8 out1* out1* stat1 warn1 warn2 stat2 out2* out2* in1* in1* en1 clim1 clim2 en2 in2* in2* top view dhc package variation a 16-lead (5mm 3mm) plastic dfn t jmax = 125c, v ja = 43c/w exposed pad (pin 17) is gnd, must be soldered to pcb *adjacent pins on the four corners are fused together 1 2 3 4 5 6 7 8 in1* in1* en1 clim1 clim2 en2 in2* in2* 16 15 14 13 12 11 10 9 out1* out1* stat1 warn1 warn2 stat2 out2* out2* top view 17 gnd mse package 16-lead plastic msop t jmax = 125c, v ja = 35c/w to 40c/w exposed pad (pin 17) is gnd, must be soldered to pcb *adjacent pins on the four corners are fused together internally. p in c on f igura t ion o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range ltc4415edhc#pbf ltc4415edhc#trpbf 4415 16-lead (5mm w 3mm) plastic dfn C40c to 125c ltc4415idhc#pbf ltc4415idhc#trpbf 4415 16-lead (5mm w 3mm) plastic dfn C40c to 125c ltc4415emse#pbf ltc4415emse#trpbf 4415 16-lead plastic msop C40c to 125c ltc4415imse#pbf ltc4415imse#trpbf 4415 16-lead plastic msop C40c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ storage temperature range .................. C 65c to 150c peak reflow temperature ..................................... 26 0c
ltc4415 3 4415fa e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (notes 2, 3). v in1 = v in2 = 3.6v, r clim = 250, unless otherwise specified. symbol parameter conditions min typ max units v in1 , v out1 , v in2 , v out2 operating supply range at least one input/output must be in this range l 1.7 5.5 v v uvlo undervoltage lockout v inx rising hysteresis l 1.63 55 1.7 v mv i qf quiescent current in forward regulation (note 5) v in1 = v en1 = v en2 = 3.6v, i out1 = C1ma, v in2 = v out2 = 0v, measured through gnd pin l 44 80 a i qoff quiescent current in shutdown v in1 = v in2 = v en2 = 3.6v, v en1 = 0v, v out1 = v out2 = 0v, measured through gnd pin l 13 28 a i qr(out) reverse turn-off current: out1 out2 v in1 = 3.6v, v out1 = 3.7v, v in2 = 3.5v, v out2 = 3.6v (v out1 > v out2 ) l l 18 5 40 11 a a i qr(in) inx pin current in reverse turn-off v out1 = v out2 = 5.5v l 4 10 a i leak(in) inx pin leakage current v in1 = v in2 = 0v, v out1 = v out2 = 5.5v C1 1 a v fr forward regulation voltage (v inx C v outx ) i outx = C1ma l 5 15 25 mv v rto reverse turn-off voltage (v inx C v outx ) l C50 C30 C10 mv r fr forward dynamic resistance in regulation i outx = C100ma to C300ma 18 30 m r on on-resistance in constant resistance mode i outx = C1a 50 70 m t on powerpath turn-on time (notes 6, 7) before enable v out1 = 1.5v, diode 1 before enable v out2 = 1.5v, diode 2 before enable v outx = 0v 10 23 250 s s s t on(sd) powerpath turn-on from shutdown (note 7) both diodes disabled and v outx = 1.5v before enable both diodes disabled and v outx = 0v before enable 70 320 s s t switch powerpath switchover time v inx (2.6v to 4.6v) to v outx starts rising, both diodes enabled, out1 and out2 tied together 9 s t off powerpath turn-off time disable to i in falling from 100ma to 1ma 2 s t ss soft-start duration (note 8) v outx = 0v 2 ms current monitor current monitor ratio i climx /i outx when i outx = C4a i climx /i outx when i outx = C2a 0.9 0.8 1 1 1.1 1.2 ma/a ma/a current limit v clim clim clamp voltage in current limit 0.5 v i lim(adj) current limit adjustability l 0.5 4 a accuracy of adjustable current limit threshold v outx = v inx C 0.5v, current limit = 4a v outx = v inx C 0.5v, current limit = 2a l l 8 15 % % i lim(int) internal current limit r climx = 0, v outx = 0v l 4 6 9 a t warn thermal warning threshold rising temperature hysteresis 130 15 c c t sd thermal shutdown threshold rising temperature hysteresis 160 20 c c open-drain status outputs ( stat1, warn1, stat2, warn2) v ol open-drain output low voltage current into open-drain output = 3ma l 0.05 0.4 v open-drain output high leakage current open-drain output voltage = 5.5v l 0 1 a t stat(on) stat turn-on time (note 6) en1 rising to stat1 pull-down en2 falling to stat2 pull-down 5 18 s s
ltc4415 4 4415fa typical p er f or m ance c harac t eris t ics i-v characteristics on-resistance vs temperature on-resistance vs v in t a = 25c, v in1 = v in2 = 3.6v, r clim = 250 unless otherwise noted. e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at t a = 25c (notes 2, 3). v in1 = v in2 = 3.6v, r clim = 250, unless otherwise specified. symbol parameter conditions min typ max units t stat(off) stat turn-off time disable to stat pull-up 2 s t warn(on) warn turn-on time current limit to warn pull-down 500 s t warn(off) warn turn-off time out of current limit to warn pull-up 5 s enable inputs (en1, en2) v enth en1 rising and en2 falling thresholds l 760 800 840 mv v enhyst en1 and en2 hysteresis 55 mv enable pin current when pulled high v en1 = v en2 = 3.6v l 0 1 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: unless otherwise specified, current into a pin is positive and current out of a pin is negative. note 3: the ltc4415 is tested under pulsed load conditions such that t j t a . the ltc4415e is guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the ltc4415i is guaranteed over the full C40c to 125c operating junction temperature range. the junction temperature (t j in c) is calculated from the ambient temperature (t a in c) and power dissipation (p d in watts) according to the formula: t j = t a + (p d ? ja ) note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. note 4: the ltc4415 includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. note 5: one channel enabled. quiescent current is identical for each channel. note 6: enable inputs are driven to supply levels. other diode is already enabled so the chip bias circuits are active. note 7: turn-on time is measured from enable to i outx rising through 1ma. when the output voltage is more than 1.2v, soft-start is disabled and turn-on is faster. note 8: current ramps from zero to the current limit during the soft-start duration. soft-start is measured from 10% to 90% of the current limit. if the load condition is such that the current does not need to go up to the current limit during start-up, the output voltage may reach steady state sooner. forward voltage drop (mv) 0 forward current (a) 2 3 200 4415 g01 1 0 50 100 150 250 4 125c 90c 25c ?40c r clim = 124 temperature (c) ?50 20 r on (m) 30 40 50 60 0 50 100 150 4415 g02 70 80 ?25 25 75 125 input voltage (v) 1 20 r on (m) 30 40 50 60 70 80 2 3 4 5 4415 g03 6
ltc4415 5 4415fa typical p er f or m ance c harac t eris t ics current limit vs output voltage quiescent current vs output current current monitor ratio vs i out short-circuit current vs temperature current monitor ratio vs temperature reverse leakage current vs temperature quiescent current vs temperature quiescent current vs v in t a = 25c, v in1 = v in2 = 3.6v, r clim = 250 unless otherwise noted. temperature (c) ?50 10p i leak(in) (a) 100p 1n 10n 100n 0 50 100 150 4415 g04 1 10 ?25 25 75 125 v in = 0v v out = 5.5v v out = 3.6v temperature (c) ?50 quiescent current (a) 60 80 100 25 75 150 4415 g05 40 20 0 ?25 0 50 100 both diodes on both diodes off (i qoff ) one diode on (i qf ) 125 input voltage (v) 1 quiescent current (a) 60 80 100 5 4415 g06 40 20 0 2 3 4 6 both diodes on both diodes off (i qoff ) one diode on (i qf ) output current (a) 10 i qf (a) 60 80 100 5 4415 g07 40 20 0 2 3 4 r clim = 124 current limit output voltage (v) 0 4 5 7 3 4415 g08 3 2 1 2 4 1 0 6 current limit (a) v in = 3.6v r clim = 0 r clim = 124 r clim = 249 r clim = 1000 temperature (c) ?50 short-circuit current (a) 4 5 6 25 4415 g09 3 2 ?25 0 150 50 75 100 125 1 0 7 v out = 0v r clim = 0 r clim = 124 r clim = 249 r clim = 1000 temperature (c) ?50 0.70 i clim /i out (ma/a) 0.80 0.90 1.00 1.20 1.10 1.30 ?25 0 25 50 4415 g10 75 100 125 150 i out = 2a r clim = 124 device 2 device 1 (high ratio) device 3 (low ratio) output current (a) 0 i clim /i out (ma/a) 0.90 1.10 1.00 4 4415 g11 0.80 0.70 1 2 3 1.30 1.20 device 1 (high ratio) device 3 (low ratio) device 2 r clim = 124
ltc4415 6 4415fa en1 thresholds vs temperature en2 thresholds vs temperature uvlo thresholds vs temperature short-circuit response short-circuit response at heavy load switchover in diode-or application load step response enable and disable response for large load capacitor enable and disable response for small load capacitor typical p er f or m ance c harac t eris t ics t a = 25c, v in1 = v in2 = 3.6v, r clim = 250 unless otherwise noted. v out1 2v/div i in1 2a/div warn1 5v/div stat1 5v/div en1 5v/div 1ms/div c out1 = 1200f r load1 = 8 4415 g12 v out1 2v/div i in1 2a/div warn1 5v/div stat1 5v/div en1 5v/div 1ms/div c out1 = 47f r load1 = 8 4415 g13 v in 0.5v/div v out 0.5v/div i in 2a/div 40s/div c out = 47f r load = 8 r clim = 124 4415 g14 3.6v 3.6v 0.1a 3.5a v in 5v/div v out 5v/div warn 5v/div i out 5a/div 100s/div c out = 4.7f r clim = 167 4415 g15 3.6v 10ma v in 5v/div v out 5v/div i out 10a/div 40s/div c out = 4.7f r clim = 167 4415 g16 3.6v 1a 1v/div v out1,2 1v/div stat1 5v/div stat2 5v/div 20s/div c out = 47f r load = 3.6 v out1 = v out2 (shorted) 4415 g17 3.55v v in2 = 4.6v v in2 = 2.6v v in1 = 3.6v v in1 , v in2 temperature (c) ?50 uvlo thresholds (v) 1.610 1.630 1.650 25 75 150 4415 g18 1.590 1.570 1.550 ?25 0 50 100 125 rising (turn on) falling (turn off) temperature (c) ?50 en1 thresholds (v) 0.800 0.850 150 4415 g19 0.750 0.700 0 50 100 ?25 25 75 125 0.900 0.775 0.825 0.725 0.875 rising (turn on) falling (turn off) temperature (c) ?50 en2 thresholds (v) 0.800 0.850 150 4415 g20 0.750 0.700 0 50 100 ?25 25 75 125 0.900 0.775 0.825 0.725 0.875 rising (turn off) falling (turn on)
ltc4415 7 4415fa p in func t ions in1 (pins 1, 2): diode 1 anode and positive power supply for ltc4415. bypass in1 with a ceramic capacitor of at least 4.7f. pins 1 and 2 are fused together on the package. these pins can be grounded when not used. en1 (pin 3): enable input for diode 1. a high signal greater than v enth enables diode 1. clim1 (pin 4): current limit adjust and monitor pin for diode 1. connect a resistor from clim1 to ground to set the current limit; the diode 1 current can then be monitored by measuring the voltage on clim1 pin. a fixed 6a internal current limit is active when this pin is shorted to ground. do not leave this pin open. minimize stray capacitance on this pin to generally less than 200pf (see applications information for more details). clim2 (pin 5): current limit adjust and monitor pin for diode 2. connect a resistor from clim2 to ground to set the current limit; the diode 2 current can then be monitored by measuring the voltage on clim2 pin. a fixed 6a internal current limit is active when this pin is shorted to ground. do not leave this pin open. minimize stray capacitance on this pin to generally less than 200pf (see applications information for more details). en2 (pin 6): enable input for diode 2. a low signal less than v enth enables diode 2. in2 (pins 7, 8): diode 2 anode and positive power supply for ltc4415. bypass in2 with a ceramic capacitor of at least 4.7f. pins 7 and 8 are fused together on the package. these pins can be grounded when not used. out2 (pins 9, 10): diode 2 cathode and output of ltc4415. bypass out2 with a ceramic capacitor of at least 4.7f. pins 9 and 10 are fused together on the package. leave these pins open when not used. stat2 (pin 11): status indicator for diode 2. open-drain output pulls down during forward diode conduction. this pin can be left open or grounded when not used. warn2 (pin 12): overcurrent and thermal warning indicator for diode 2. open-drain output pulls down when diode 2 current exceeds its current limit or die temperature is close to thermal shutdown. warn1 (pin 13): overcurrent and thermal warning indicator for diode 1. open-drain output pulls down when diode 1 current exceeds its current limit or die temperature is close to thermal shutdown. power loss vs output current efficiency vs output current typical p er f or m ance c harac t eris t ics t a = 25c, v in1 = v in2 = 3.6v, r clim = 250 unless otherwise noted. output current (a) 0 power loss (w) 0.4 0.6 4 4415 g21 0.2 0 1 2 3 1.0 0.8 125c 25c ?40c r clim = 124 output current (a) 0 90 efficiency (%) 91 93 94 95 100 97 1 2 4415 g22 92 98 99 96 3 4 125c 25c ?40c r clim = 124
ltc4415 8 4415fa b lock diagra m gate driver current limit temperature sensor in1 3 13 en1 uvlo1 out1 warn1 4 clim1 out1 15, 16 1, 2 p1 p2 14 stat1 gate driver current limit temperature sensor in2 6 12 en2 uvlo2 out2 warn2 5 clim2 out2 4415 bd 9, 10 7, 8 11 stat2 i out1 1000 i out2 1000 p in func t ions stat1 (pin 14): status indicator for diode 1. open-drain output pulls down during forward diode conduction. this pin can be left open or grounded when not used. out1 (pins 15, 16): diode 1 cathode and output of ltc4415. bypass out1 with a ceramic capacitor of at least 4.7f. pins 15 and 16 are fused together on the package. leave these pins open when not used. gnd (exposed pad pin 17): device ground. the exposed pad must be soldered to pcb ground to provide both electrical connection to ground and good thermal con- ductivity to pcb.
ltc4415 9 4415fa o pera t ion the ltc4415 consists of two powerpath ideal diode cir - cuits within a single package. each diode in the ltc4415 is capable of supplying a maximum rated output current of 4a from its input supply with typical forward conduction resistance of 50m. the diodes are enabled using level-sensitive enable inputs en1 and en2 with opposite polarity to achieve a prioritizer function with minimal quiescent current during diode-or implementation. the enable threshold on the enable pins (v enth ) is 800mv (typical) with one-sided hysteresis of 55mv (typical). for rising voltage on the en1 pin, diode?1 is enabled when v en1 > 800mv (typical), and on the fall- ing edge it is disabled when v en1 < 745mv (typical). for falling voltage on the en2 pin, diode 2 is enabled when v en2 < 800mv (typical), and on the rising edge it is dis- abled when v en1 > 855mv (typical). en1 or en2 pin volt- ages should not exceed the highest voltage on the input (in1, in2) or output (out1, out2) pins. forward conduction of the ltc4415 diodes has three op - erating ranges as a function of the load current, as shown in figure 1 and described below: 1. for small load current, a low forward voltage drop (v fr = 15mv typical) is maintained by modulating the series resistance offered by the pfets (p1/p2) in the current paths as shown in the block diagram. this op- erating mode is referred to as constant v fr regulation. in battery-powered and low headroom applications, the low forward drop of the ideal diodes extend the operat - ing range beyond that of schottky diodes. 2. at higher load currents, the ltc4415 gate driver can no longer modulate the series resistance of the pfet s (p1/p2) to maintain constant forward drop. this transi - tion occurs when the gate voltage of the series pfets (p1/p2) has been brought down to gnd. the ideal diodes subsequently operate with constant resistance, r on , between inputs and outputs, in1/in2 and out1/ out2, respectively. 3. as the load current exceeds the current limit, the series pfets offer higher resistance between in1/in2 and out1/out2 by reducing the gate drive in order to limit the load current; so the forward voltage drop increases rapidly. this operating mode is referred to as constant current operation. when the output of either diode is driven higher than its input by an alternate supply, conduction through that diode is suspended to prevent reverse conduction from out1/ out2 to in1/in2. this function allows implementation of a power supply or function by simply tying the outputs out1 and out2 together. current limit setting the output current limit of each diode can be set inde- pendently by connecting resistors from the current limit adjust pins clim1 and clim2 to ground. the current out of the clim1 and clim2 pins are 1/1000 of the ideal diode output currents i out1 and i out2 respectively. when the load currents increase so that the clim1 or clim2 pin voltages exceeds 0.5v, the ltc4415 detects an overcurrent condition and regulates the current to a fixed value. the required value of resistor r clim for output current limit of i lim is calculated as follows: r clim = 1000 ? 0.5v i lim the allowed range of r clim is 125 to 1000 unless the clim1/clim2 pins are shorted to gnd, in which case the ltc4415 limits the load current using a fixed internal current limit of 6a. overcurrent status when either of the ideal diodes is operating in current limit, the corresponding warning pin, warn1/ warn2, is pulled low by an open-drain nfet after a 500s delay. normal operation resumes and the warning pin is released constant current constant resistance constant voltage forward voltage (v) v fr 4415 f01 current (a) i lim slope = 1 r on slope = 1 r fr figure 1. forward characteristics of ltc4415
ltc4415 10 4415fa when the load current decreases below the current limit. power consumption in ltc4415 increases during opera - tion in current limit due to the large voltage drop across the pfet devices (p1 or p2). load current monitor the current limit pins output 1/1000th of the ideal diode output current. the voltage across the current limit resis- tor can be measured to monitor the current through each ideal diode as follows: i out = 1000 ? v clim r clim note that the current monitor function via v clim is not available when clim pins are grounded to use the fixed internal current limit. soft-start an internal soft-start is included for each ideal diode to minimize the start-up inrush current. when either of the diodes start forward conduction, the load current ramps from zero to the set current limit over a period of 2ms. the soft-start can be monitored by observing the clim1 and clim2 pin voltages when they are connected to grounded resistors. soft-start duration is reduced to 0.5ms (typical) when the clim pins are grounded. in order to minimize output droop during switchover between input sources in power supply oring applications, soft-start is disabled when the output voltage is above 1.2v. forward conduction status monitor active low open-drain output status signals, stat1 and stat2 , indicate the forward conduction status of each ideal diode. with resistor pull-ups on these status pins, a low voltage indicates forward conduction from input to output, in1/in2 to out1/out2, respectively. the status pins go to high impedance when the respective ideal diodes are disabled, during reverse turn-off conditions, or during thermal shutdown. thermal warning and shutdown thermal sensors within the ltc4415 monitor the die tem - perature when either of the diodes are enabled. when the die temperature exceeds the warning threshold (130c), the warn1 / warn2 pins are pulled down with open-drain nfets while the ltc4415 continues to operate normally. this gives some time for the user to reduce the load current to avoid thermal shutdown. the warning signal is deas- serted when the die temperature cools down below 115c. thermal shutdown is triggered when the internal die temperature increases beyond the fault threshold (160c). status pins, stat1 / stat2 , are deasserted during thermal shutdown to indicate the interruption in forward condi - tion. normal operation resumes when the die temperature cools below 140c. note that prolonged operation at the overtemperature condition degrades device reliability. figure 2 shows warn followed by thermal shutdown caused by an output short-circuit to ground. time to thermal shutdown varies depending on power dissipation, ambient temperature and board layout. the output cur - rent ramps up after the device cools down below 140c, but shuts down repeatedly as the device overheats due to persistent short. o pera t ion figure 2. current limit warning and thermal shutdown on output short circuit v out 2v/div i out 2a/div 10ms/div 4415 f02 v in = 3.6v r clim = 124 c out = 4.7f stat 5v/div warn 5v/div output shorted to gnd restart due to thermal hysteresis thermal shutdown the thermal sensors are independent for each diode to warn of, or shut down the heat generating path so that it does not hinder the normal operation of the other path. depending on the amount of heat generated, the whole die may still heat up and eventually shut down the other channel.
ltc4415 11 4415fa a pplica t ions i n f or m a t ion o pera t ion stability considerations any capacitance on the clim pins adds a pole to the cur - rent control loop. therefore, stray capacitance on these pins must be kept to a minimum. although the maximum allowed value of the current limit adjust resistor is 1000, any additional capacitance on these pins reduces the maximum allowed resistance, consequently increasing the minimum allowed current limit. for stable operation, the pole frequency at the clim pins should be kept above 800khz. therefore, if the clim pin parasitic capacitance is c p , the following equation should be used to calculate the maximum allowed resistor r clim : r clim 1 2 ? 800khz ? c p when the voltage at the clim pins are monitored using a long cable, such as an oscilloscope probe, decouple the parasitic capacitance of the probe and the monitor system using a series resistor as shown in figure 3, where a 20k resistor has been added between the clim pin and the probe to ensure stable operation. input and output capacitors high current transients through parasitic inductance on the input and output sides of the ideal diodes can cause volt- age spikes on the in1/in2/out1/out2 pins. these current transients can occur on power plug-in, load disconnect or switching, disable, or even thermal shutdown. limit inductance and/or increase bypass capacitors to prevent pin voltages from exceeding the absolute maximum rat- ing of 6v. some esr in these capacitors may be helpful in dampening the resonances and minimizing the ringing caused by hot plugging or load switching. refer to ap- plication note 88, entitled, ceramic input capacitors can cause overvoltage transients for a detailed discussion and mitigation of this phenomenon. the values of the input and output decoupling capacitors also depends on the maximum allowable droop during switchover in power supply oring applications. typical du - ration for ltc4415 ideal diodes to switchover from reverse turn-off to forward conduction, t switch , is 9s. therefore, the minimum decoupling capacitance, c, required for a specified maximum output voltage droop, ? v, when one of the input voltages drops, can be calculated as follows: c = i load ? t switch ? v where i load is the load current at the time of switchover. for example, the required value of output capacitance for a 100mv maximum droop in the output voltage during quick switchover at 1a load would be 100f. note that both supplies share the load during switchover, and therefore reduce the droop, when the voltage on the falling supply pin changes slowly. figure 3. current monitor with high capacitance probe/instrument undervoltage lockout each ideal diode contains an independent uvlo control circuit so that one input experiencing undervoltage lockout does not hinder normal operation of the other channel. the diode conduction path is turned off and the status signal, stat1 / stat2 , is deasserted during an undervolt - age condition. clim pin c p 4415 f03 c monitor r clim 20k monitor
ltc4415 12 4415fa a pplica t ions i n f or m a t ion board layout considerations when laying out the printed circuit board, the following checklist should be followed to ensure proper operation of the ltc4415: 1. connect the exposed pad of the package (pin 17) directly to a large pc board ground to minimize thermal imped - ance. correctly soldered to a 2500mm 2 double-sided 1oz copper board, the dfn package has a thermal resistance ( ja ) of approximately 43c/w. failure to make good contact between the exposed pad on the backside of the package and an adequately sized ground plane re- sults in much larger thermal resistance, raising the die temperature for given power dissipation. an example layout for double layer board is given in figure 4. via holes are used in the board under and near the device to conduct heat away from the device to the bottom layer. 2. the traces to the input supplies, outputs and their decoupling capacitors should be short and wide to minimize the impact of parasitic inductance. connect the gnd side of the capacitors directly to the ground plane of the board. the decoupling capacitors provide the transient current to the internal power mosfets and their drivers. 3. minimize the parasitic capacitance on clim1 and clim2 pins for stable operation. figure 4. example board layout for a double-sided pcb en1 in1 in2 out1 out2 4415 f04 clim1 clim2 warn1 warn2 stat1 stat2 en2
ltc4415 13 4415fa typical a pplica t ions precision enable inputs and independent status outputs provide flexibility in power supply back up and load share applications using the two high current ideal diode circuits in the ltc4415, as shown in the following examples. the features shown in these application circuits can be com - bined in custom applications as needed. prioritized switchover to a backup battery the application circuit, figure 5, illustrates switchover from a primary power source to backup power at a pre - cise input voltage using the prioritized power supply-or application circuit. diode 2 is enabled when the primary power source voltage on diode 1 input falls below the threshold given as follows: v in1 < 0.8v ? 1 + r1 + r2 r3 ? ? ? ? ? ? as v in1 falls further, diode 1 is disabled when the primary power source voltage falls below the threshold determined by the resistor divider on enable pin en1: v in1 < 0.8v ? v enhyst ( ) ? 1 + r1 r2 + r3 ? ? ? ? ? ? the built-in hysteresis on the enable pins in the ltc4415 provides some overlap of diode enables around the swi- tchover of power supplies. resistor r2 can be optionally used for additional overlap between the two supplies. the additional overlap is given by: v overlap v enth ? r2 r3 when r2 r3 << 1 the enable overlap minimizes the load voltage droop during switchover. both input power supplies provide power to the load during the overlap. the status output pins can be pulled up to the output voltage or to a logic power supply. automatic switchover to a backup battery and keep- alive power source figure 6 illustrates an application circuit for automatic switchover to the backup battery if the primary power source voltage falls below the backup battery voltage. the wired-and of the status outputs is used to drive the gate of a pair of back-to-back connected external nmos (m1 and m2) when both primary and backup power sources are absent or below uvlo or during thermal shutdown of ltc4415. under these conditions, the keep-alive source supplies power to critical components of the system. at the same time, the wired-and status output turns off figure 5. prioritized power supply oring figure 6. automatic switchover to a backup battery with provision for keep-alive power to the load when both are absent ideal ideal ltc4415 gnd en1 r1 47k 4415 f06 47f load dmn2215udm m1 m2 m3 optional keep alive/ coin cell clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 backup bat in1 out1 out2 primary power source + ideal ideal ltc4415 gnd en1 4415 f05 4.7f to load r1 r2 r3 r clim2 470k r clim1 clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 in1 out1 out2 primary power source seconday power source (bat) + 470k 470k 470k
ltc4415 14 4415fa typical a pplica t ions non-critical high current loads. if the status resistors are pulled up through the keep-alive power source itself as shown in figure 6, the output voltage is limited to: v out = v keep_alive C v gs(m1,2) where v gs(m1,2) is the voltage drop from gate to source of the composite nmos device (m1 and m2). the pull-up resistor, r1, consumes power from the keep-alive source when the primary or backup sources supply power to the load. the primary power source or backup battery supplies power to the load when either of them are higher than the output voltage. current limit on any of the diode power paths can be set to automatically fold back as the output voltage drops (to reduce power consumption), by switching out a resistor on the clim pin, as shown in figure 6 for diode 1. the gate of nmos m3 can optionally be fed from a resistor divided output voltage to adjust the output voltage threshold of current foldback. multiple battery charging figure 7 illustrates an application circuit for automatic dual battery charging from a single charger. the battery with lower voltage receives larger charging current until both battery voltages are equal, then both are charged. while both batteries are charging simultaneously, the higher capacity battery gets proportionally higher current from the charger. for li-ion batteries, both batteries achieve the charger float voltage minus the forward regulation voltage of 15mv. this concept can be extended to more than two batteries using additional ltc4415. the stat1 , stat2 pins provide information as to when the batteries are being charged. for intelligent control, the en1/en2 input pins can be used with a microcontroller as shown in figure 9 later in this section. figure 7. dual battery charging from a single charger prog en fault batsens to p from p ntc chrg pgnd 10f pv in v insense bat idet timer r4 549 r5 549 c2 0.22f c1 10f v in 4.5v to 5.5v c3 0.1f ss sw sense ltc4001 l1 1.5h gndsens r3 10k 25c r2 1k d1 led r1 10k ideal 50k ideal ltc4415 gnd en1 4415 f07 clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 in1 out1 out2 bat2 load2 1.5k 1.5k + bat1 + load1
ltc4415 15 4415fa typical a pplica t ions load sharing by multiple batteries and automatic switchover to a preferred power supply (such as a wall adapter) an application circuit for dual battery load sharing with automatic switchover to a wall adapter (when present) is shown in figure 8. in the absence of the wall adapter, the higher voltage battery provides the load current until it has discharged to the voltage of the other battery. the load is then shared between the two batteries according to their capacities, the higher capacity battery providing proportionally higher current to the load unless limited by its current limit. when a wall adapter is applied, the output voltage rises as the body diode of pfet mp1 conducts and both of the ideal diode paths in the ltc4415 stop conducting due to reverse turn-off. at this time, the wired-or status signal pulls up the gate voltage of nfet mn1, pulling down the gate voltage of power pfet mp1, turning it on. the wired - or status signal indicates whether the wall adapter or either of the two batteries is supplying the load current. the two application circuits described in figure 7 and figure 8 can be cascaded for dual battery charging and load sharing. microcontrolled power switch with reverse blocking, selectable current limit, soft-start and monitoring figure 9 illustrates an application circuit for microcon - troller monitoring and control of two power sources. the microcontroller monitors the input supply voltages and commands the ltc4415 through en1/ en2 inputs. currents through the ideal diodes are monitored by the microcontroller measuring clim1/clim2 pin voltages using adcs. the current limit can be adjusted for either diode using an external fet as shown in this application for diode 1 with mn1. the two ideal diode outputs are connected together for power source oring, or they may feed different loads. parallel diodes for lower resistance or higher current output the two ideal diodes in the ltc4415 can be connected in parallel as shown in figure 10 to achieve a low resistance powerpath. the master enable input, enable, turns on diode 2. en1 is tied to the output so that diode 1 conducts only after the output has charged up (by diode 2 according to its current limit setting). diode 1 is disabled when the figure 8. dual battery load sharing with automatic switchover to a wall adapter ideal ideal ltc4415 gnd en1 470k mn1 irlml2402 clim1 clim2 stat1 stat warn1 warn2 stat2 en2 in2 bat2 bat1 in1 out1 out2 470k 4.7f + mp1 irfhs9301 wall adapter pv in1 pv in2 sw2 sw3 fb2 fb3 v out1 ltc3521 shdn2 shdn1 1.0m 137k 68.1k 10f v in 4.7h 4.7h v out1 3.3v 0.8a v out2 1.8v 0.6a 100k 100k 10f 4.7h v out3 1.2v 0.6a 221k 4415 f08 shdn3 pwm sw1a sw1b fb1 pgood2 pgood1 pgood3 pgnd1a pgnd2 gnd pgnd1b on off pwm burst +
ltc4415 16 4415fa figure 10. parallel diodes with current limit foldback and reverse polarity protection output falls below a threshold set by the resistor divider on en1 pin. this arrangement results in current limit foldback, reducing the current limit of the parallel diodes to that of only diode 2 when the output voltage falls, thus controlling power dissipation. an optional schottky diode can be inserted in series with the chip ground as shown in figure 10 to protect ltc4415 against input power source reverse polarity. the presence of the schottky shifts the uvlo and enable pin thresholds by a voltage equal to the forward voltage drop of the schottky diode. power backup using supercapacitors and optional keep-alive cell an application of dual backup power is shown on the last page of this data sheet. diode 2 provides power to the triple dc/dc converter (ltc3521) when the primary input power (v dd ) is available, possibly from a wall adapter. when the input power falls below the supercapacitor voltage, the supercapcitor provides power to the ltc3521. the supercapacitor charger (ltc3625) provides a power failure comparator output signal (pfo) when its input voltage falls below a preset voltage defined by the resistive divider on the pfi input. the pfo signal is available to start the shutdown of high current applications. when the super - capacitor discharges to a voltage level determined by the resistor divider on en1 input of ltc4415, the wired-and status signal of ltc4415 pulls up because neither of the diode paths in ltc4415 are conducting and the coin cell provides power through a back-to-back connected pair of nfets, m1 and m2. the wired-and status signal is available to signal that only low current circuits such as real-time clock or memory remain enabled while operating from the coin cell. figure 9. microcontrolled powerpath monitoring and control typical a pplica t ions ideal ideal ltc4415 gnd en1 mn1 irlml2402 470k 4415 f09 4.7f load clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 in1 out1 out2 primary power source auxilliary power source micro- controller ideal ideal ltc4415 gnd en1 470k 4415 f10 load clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 d1 1n5817 in1 out1 out2 power source enable
ltc4415 17 4415fa 3.00 0.10 (2 sides) 5.00 0.10 (2 sides) note: 1. drawing proposed to be made variation of version (wjed-1) in jedec package outline mo-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 1.29 ref bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.20 typ 4.40 0.10 (2 sides) 1 8 16 9 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dhc16 var a) dfn 0410 0.25 0.05 pin 1 notch 0.50 bsc 4.40 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.20 0.05 0.50 bsc 0.65 0.05 1.29 0.05 3.50 0.05 package outline 0.25 0.05 dhc package 16-lead plastic dfn (5mm 3mm) (reference ltc dwg # 05-08-1872 rev ?) variation a p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc4415 18 4415fa p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (mse16) 0911 rev e 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 16 16151413121110 1 2 3 4 5 6 7 8 9 9 1 8 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc bottom view of exposed pad option 2.845 0.102 (.112 .004) 2.845 0.102 (.112 .004) 4.039 0.102 (.159 .004) (note 3) 1.651 0.102 (.065 .004) 1.651 0.102 (.065 .004) 0.1016 0.0508 (.004 .002) 3.00 0.102 (.118 .004) (note 4) 0.280 0.076 (.011 .003) ref 4.90 0.152 (.193 .006) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.12 ref 0.35 ref mse package 16-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1667 rev e)
ltc4415 19 4415fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 4/12 clarified footnotes and added new note 5 for quiescent current changed fet mp1 part number on figure 8 3, 4 15
ltc4415 20 4415fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2011 lt 0412 rev a ? printed in usa r ela t e d p ar t s typical a pplica t ion power backup using supercapacitors and optional keep-alive cell part number description comments LTC4411 2.6a low loss ideal diode monolithic low loss powerpath, thinsot package ltc4412 powerpath controller 3v to 28v input voltage range, thinsot package ltc4413-1/ ltc4413-2 dual 2.6a, 2.5v to 5.5v, ideal diodes in 3mm w 3mm dfn 140m on-resistance, overvoltage protection sensor with drive output ltc4414 36v, low loss powerpath controller for large pfets drives large q g pfets, 3.5v to 36v ltc4416 36v, low loss dual powerpath controllers designed to drive large and small q g pfets, 3.5v to 36v ltc4352 low voltage ideal diode controller with monitoring controls single n-channel mosfet, input supply monitors, 2.9v to 18v ltc4354 negative high voltage diode-or controller and monitor controls two n-channel mosfets, 4.5v to 80v ltc4355 positive high voltage diode-or controller and monitor controls two n-channel mosfets, 9v to 80v ltc4357 positive high voltage ideal diode controller controls single n-channel mosfet, 9v to 80v ltc4358 5a monolithic ideal diode 20m n-channel mosfet, 9v to 26.5v ltc4066 usb power controller and li-ion linear charger with low loss ideal diode seamless transition between input power sources: li-ion battery, usb and 5v wall adapter ltc4425 linear supercapacitor charger with current-limited ideal diode and v/i monitor 50m on-resistance, 2.7v to 5.5v, programmable current limit, programmable output voltage mode ltc2952 pushbutton ideal diode powerpath controller with supervisor controls two p-channel mosfets, 2.7v to 28v ideal ideal ltc4415 gnd en1 m2 clim1 clim2 stat1 warn1 warn2 stat2 en2 in2 in1 out1 out2 125 300k 200k 125 m1 pv in1 pv in2 sw2 sw3 fb2 fb3 v out1 ltc3521 shdn2 shdn1 1.0m 137k 68.1k 10f v in 4.7h 47k 4.7h l1 3.3h v dd 294k 100k r prog 78.7k l2 3.3h v out1 3.3v 1a keep-alive/coin cell v out2 1.8v 0.6a 100k 100k 10f 4.7h v out3 1.2v 0.6a 221k 4415 ta02 shdn3 pwm sw1a sw1b fb1 pgood2 pgood1 pgood3 pgnd1a pgnd2 gnd pgnd1b on off pwm burst 47f dmn2215udm 22f c top 360f c bot 360f sw1 v out sw2 en v in pfi v sel ctl gnd gnd v mid pfo prog ltc3625

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